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  general description the max9972 four-channel, ultra-low-power, pin-elec- tronics ic includes, for each channel, a three-level pin driver, a window comparator, a passive load, and force-and-sense kelvin-switched parametric measure- ment unit (pmu) connections. the driver features a -2.2v to +5.2v voltage range, includes high-impedance and active-termination (3rd-level drive) modes, and is highly linear even at low voltage swings. the window comparator features 500mhz equivalent input band- width and programmable output voltage levels. the passive load provides pullup and pulldown voltages to the device-under-test (dut). low-leakage, high-impedance, and terminate controls are operational configurations that are programmed through a 3-wire, low-voltage, cmos-compatible serial interface. high-speed pmu switching is realized through dedicated digital control inputs. this device is available in an 80-pin, 12mm x 12mm body, 1.0mm pitch tqfp with an exposed 6mm x 6mm die pad on the bottom of the package for efficient heat removal. the max9972 is specified to operate over the 0? to +70? commercial temperature range, and fea- tures a die temperature monitor output. applications nand flash testers dram probe testers low-cost mixed-signal/system-on-chip (soc) testers active burn-in systems structural testers features  small footprintfour channels in 0.3in 2  low-power dissipation: 325mw/channel (typ)  high speed: 300mbps at 3v p-p  -2.2v to +5.2v operating range  active termination (3rd-level drive)  integrated pmu switches  passive load  low-leak mode: 20na (max)  low gain and offset error max9972 quad, ultra-low-power, 300mbps ate drivers/comparators ________________________________________________________________ maxim integrated products 1 part temp range pin- package heat extraction max9972accs+ 0? to +70? 80 tqfp-ep* bottom ordering information 19-0474; rev 9; 10/11 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. pin configuration appears at end of data sheet. + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad.
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v dd = +8v, v ss = -5v, v l = +3v, v comphi = +1v, v complo = 0v, v ldv_ = 0v, load en low = load en high = 0, t j = +75?. all temperature coefficients measured at t j = +50? to +100?, unless otherwise noted.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to gnd ...........................................................-0.3v to +9.4v v ss to gnd..........................................................-6.25v to +0.3v v dd to v ss ........................................................................+15.7v v l to gnd.................................................................-0.3v to +5v dhv_, dtv_, dlv_, ldv_, dut_ to gnd ...................v ss to v dd data_, rcv_ ...........................................................-0.3v to +5v chv_, clv_, cmph_, cmpl_, comphi, complo to gnd.....................................................v ss to v dd force_, sense_, pmu_ to gnd ..............................v ss to v dd ld , din, sclk, cs to gnd......................................-0.3v to +5v dut_, cmph_, cmpl_ short-circuit duration ...........continuous dhv_, dlv_, dtv_ to each other ..............................v ss to v dd chv_, clv_ to dut_ ..................................................v ss to v dd dout to gnd...........................................................-0.3v to +5v temp short-circuit duration ......................................continuous force_ path switch current..............................................50ma sense_ path switch current .............................................1.5ma continuous power dissipation (t a = +70?) 80-pin tqfp-ep (derate 35.7mw/? above +70?) ....2857mw storage temperature range .............................-65? to +150? junction temperature ......................................................+150? lead temperature (soldering, 10s) .................................+300? soldering temperature (reflow) .......................................+260? parameter symbol conditions min typ max units driver (all specifications apply when dut_ = dhv_, dut_ = dtv_, or dut_ = dlv_) dc characteristics voltage range -2.2 +5.2 v gain measured at 0v and 3v 0.995 1 1.005 v/v gain temperature coefficient 50 ppm/? offset v dhv_ = 2v, v dlv_ = 0v, v dtv_ = 1v ?0 mv offset temperature coefficient ?50 ?/? power-supply rejection ratio psrr v dd , v ss independently varied over full range 18 mv/v maximum dc drive current i dut_ all drive mode specs valid over this range ?0 ma dc output resistance i dut_ = 10ma (note 2) 48.5 49.5 50.5 _ dc output resistance variation i dut_ = -40ma to +40ma 2.5 _ dhv_ to dlv_ and dtv_: v dlv_ = v dtv_ = +1.5v, v dhv_ = -2.2v, +5.2v 5 dlv_ to dhv_ and dtv_: v dhv_ = v dtv_ = +1.5v, v dlv_ = -2.2v, +5.2v 5 dc crosstalk dtv_ to dhv_ and dlv_: v dhv_ = v dlv_ = +1.5v, v dtv_ = -2.2v, +5.2v 5 mv 0 to 3v (note 3) ? mv linearity error full range (note 4) ?5 mv
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dd = +8v, v ss = -5v, v l = +3v, v comphi = +1v, v complo = 0v, v ldv_ = 0v, load en low = load en high = 0, t j = +75?. all temperature coefficients measured at t j = +50? to +100?, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units ac characteristics (note 5) dynamic output current (note 1) 40 ma drive-mode overshoot, undershoot, and preshoot 200mv to 4v p-p swing (note 6) 5% +10 mv v dhv_ = v dtv_ = 1v, v dlv_ = 0v 25 term-mode spike v dlv_ = v dtv_ = 0v, v dhv_ = 1v 25 mv v dlv_ = -1v, v dhv_ = 0v 25 high-impedance-mode spike v dlv_ = 0v, v dhv_ = 1v 25 mv p r op ag ati on d el ay, d ata to outp ut 1.6 2.6 4.2 ns prop-delay temperature coefficient 10 ps/? prop-delay match, t lh vs. t hl 30 ps prop-delay skew, drivers within package 150 ps 3v p-p , 40mhz, pw = 4ns to 21ns 20 prop-delay change vs. pulse width relative to 12.5ns pulse 1v p-p , 40mhz, pw = 2.5ns to 23.5ns 90 ps prop-delay change vs. common- mode voltage 1v p-p , v dlv_ = 0 to 3v, relative to delay at v dlv_ = 1v 80 ps prop delay, data to high impedance v dhv_ = +1.5v, v dlv_ = -1.5v, both directions 1.8 ns prop delay, data to term v dhv_ = +1.5v, v dlv_ = -1.5v, v dtv_ = 0v, both directions 1.6 ns minimum voltage swing (note 7) 25 mv v dhv_ = 0.2v, v dlv_ = 0v, 20% to 80% 0.7 v dhv_ = 1v, v dlv_ = 0v, 20% to 80% 0.7 v dhv_ = 3v, v dlv_ = 0v, 10% to 90% 1.5 2.0 2.5 v dhv_ = 4v, v dlv_ = 0v, r l = 500 _ , 10% to 90% 2.6 rise/fall time v dhv_ = 5v, v dlv_ = 0v, r l = 500 _ , 10% to 90% 3.4 ns rise/fall-time matching v dhv_ = 1v to 5v ? % 200mv, v dhv_ = 0.2v, v dlv_ = 0v 1.8 1v, v dhv_ = 1v, v dlv_ = 0v 2.4 minimum pulse width (note 8) 3v, v dhv_ = 3v, v dlv_ = 0v 3.3 ns
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators 4 _______________________________________________________________________________________ electrical characteristics (continued) (v dd = +8v, v ss = -5v, v l = +3v, v comphi = +1v, v complo = 0v, v ldv_ = 0v, load en low = load en high = 0, t j = +75?. all temperature coefficients measured at t j = +50? to +100?, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units comparator (note 9) dc characteristics (driver in high-impedance mode) (v comphi = 0.8v, v complo = 0.2v) input voltage range -2.2 +5.2 v differential input voltage v dut_ - v chv_ ,v dut_ - v clv_ -7.4 +7.4 v hysteresis v chv_ = v clv_ = 1.5v 8 mv input offset voltage v dut_ = 1.5v 10 mv input offset temperature coefficient 25 v/c common-mode rejection ratio cmrr v dut_ = 0 and 3v 60 db v dut_ = 1.5v 5 linearity error (note 10) v dut_ = -2.2v, +5.2v 10 mv power-supply rejection ratio psrr v dut_ = 1.5v, supplies independently varied over full range 5 mv/v ac characteristics (note 11) terminated (note 12) 500 equivalent input bandwidth high impedance (note 13) 300 mhz propagation delay 0.9 2.2 3.1 ns prop-delay temperature coefficient 4 ps/c prop-delay match, t lh to t hl 120 ps prop-delay skew, comparators within package same edges (lh and hl) 200 ps 0 to 4.9v 20 prop-delay dispersions vs. common-mode voltage (note 14) -1.9v to +4.9v 30 ps prop-delay dispersions vs. overdrive v chv_ = v clv_ = 0.1v to 0.9v, v dut_ = 1v p-p , t r = t f = 500ps, 10% to 90% relative to timing at 50% point 220 ps prop-delay dispersions vs. pulse width 2ns to 23ns pulse width, relative to 12.5ns pulse width 60 ps prop-delay dispersions vs. slew rate 0.5v/ns to 2v/ns 50 ps
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators _______________________________________________________________________________________ 5 electrical characteristics (continued) (v dd = +8v, v ss = -5v, v l = +3v, v comphi = +1v, v complo = 0v, v ldv_ = 0v, load en low = load en high = 0, t j = +75?. all temperature coefficients measured at t j = +50? to +100?, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units logic outputs reference voltages comphi and complo (note 15) 0 +3.6 v output high voltage offset i out = 0ma, relative to comphi at v comphi = 1v ?0 mv output low voltage offset i out = 0ma, relative to complo at v complo = 0v ?0 mv output resistance i chv_ = i clv_ = ?0ma 40 50 60 current limit 25 ma rise/fall time 20% to 80%, v chv_ = 1v p-p , load = t-line, 50 , > 1ns 0.7 ns passive load dc characteristics (r dut_ 10m ) ldv_ voltage range -2.2 +5.2 v gain 0.99 1.01 v/v gain temperature coefficient 0.02 %/? offset ?00 mv offset temperature coefficient 0.02 mv/? power-supply rejection ratio psrr 10 mv/v output resistance tolerance?igh value i dut_ = ?.2ma, v ldv_ = 1.5v 7.125 7.5 7.875 k output resistance tolerance?ow value i dut_ = ?.1ma, v ldv_ = 1.5v 1.90 2.0 2.10 k 0 to 3v ?0 switch resistance variation relative to 1.5v full range ?0 % v ldv_ = -2v, v dut_ = +5v ? maximum output current (note 16) v ldv_ = +5v, v dut_ = -2v ? ma linearity error, full range measured at -2.2v, +1.5v, and +5.2v (note 16) ?5 mv ac characteristics settling time, ldv_ to output v ldv_ = -2v to +5v step, r dut_ = 100k (note 17) 0.5 ? output transient response v ldv_ = +1.5v, v dut_ = -2v to +5v square wave at 1mhz, r dut_ = 50 20 ns
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators 6 _______________________________________________________________________________________ electrical characteristics (continued) (v dd = +8v, v ss = -5v, v l = +3v, v comphi = +1v, v complo = 0v, v ldv_ = 0v, load en low = load en high = 0, t j = +75?. all temperature coefficients measured at t j = +50? to +100?, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units pmu switches (force_, sense_, pmu_) voltage range -2.2 +5.2 v force switch resistance v force_ = 1.5v, i pmu_ = ?0ma 40 v pmu_ = 6.2v, v force_ set to make i force_ = 30ma 25 force switch compliance v pmu_ = -3.2v, v force_ set to make i force_ = -30ma 25 ma 0 to 3v ?0 force switch resistance variation (note 18) full range ?0 % sense switch resistance 700 1000 1300 sense switch resistance variation relative to 1.3v, full range ?0 % pmu_ capacitance force-and-sense switches open 5 pf force_ capacitance 5pf sense_ capacitance 0.2 pf force_ external capacitance allowable external capacitance 2 nf sense_ external capacitance allowable external capacitance 1 nf force_ and sense_ switching speed connect or disconnect 10 ? pmu_ leakage force en_ = sense en_ = 0, v force_ = v sense_ = -2.2v to +5.2v ?.5 5 na total function dut_ leakage, high-impedance mode load switches open, v dut_ = +5.2v, v clv_ = v chv_ = -2.2v, v dut_ = -2.2v, v clv_ = v chv_ = +5.2v, full range 2a leakage, low-leakage mode full range ? ?0 na low-leakage recovery time (note 19) 10 ? term mode 2 combined capacitance high-impedance mode 5 pf load resistance (note 20) 1 g load capacitance (note 20) 12 nf
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators _______________________________________________________________________________________ 7 electrical characteristics (continued) (v dd = +8v, v ss = -5v, v l = +3v, v comphi = +1v, v complo = 0v, v ldv_ = 0v, load en low = load en high = 0, t j = +75?. all temperature coefficients measured at t j = +50? to +100?, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units voltage reference inputs (dhv_, dtv_, dlv_, data_, rcv_, chv_, clv_, ldv_, comphi, complo) input bias current ?00 ? input bias current temperature coefficient ?00 na/? settling to output 0.1% of full-scale step 10 ? digital inputs (data_, rcv_, ld , din, sclk, cs ) input high voltage (note 21) v l /2 + 0.2 +3.6 v input low voltage (note 21) 0 v l /2 - 0.2 v d ata_, 100 input bias current ld , din, sclk, cs 1 ? serial data output (dout) output high voltage i oh = -1ma v l - 0.4 v l v output low voltage i ol = 1ma 0 +0.4 v output rise and fall time c l = 10pf 1.1 ns serial-interface timing (note 22) sclk frequency 50 mhz sclk pulse-width high t ch 10 ns sclk pulse-width low t cl 10 ns cs low to sclk high setup t css0 3.5 ns sclk high to cs low hold t csh0 3.5 ns cs high to sclk high setup t css1 3.5 ns sclk high to cs high hold t csh1 15 ns din to sclk high setup t ds 7.5 ns din to sclk high hold t dh 3.5 ns cs high to load low hold t cshld 6ns cs high pulse width t cswh 20 ns ld low pulse width t ldw 20 ns ld high to any activity 0ns sclk low to dout delay t do c l = 10pf 5 40 ns v l rising to cs low power-on delay 2 s temp sensor nominal voltage t j = +27? 3.20 v temperature coefficient +10 mv/? output resistance 500
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators 8 _______________________________________________________________________________________ electrical characteristics (continued) (v dd = +8v, v ss = -5v, v l = +3v, v comphi = +1v, v complo = 0v, v ldv_ = 0v, load en low = load en high = 0, t j = +75?. all temperature coefficients measured at t j = +50? to +100?, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units power supplies positive supply voltage v dd (note 23) 7.6 8 8.4 v negative supply voltage v ss (note 23) -5.25 -5 -4.75 v logic supply voltage v l 2.3 3.6 v positive supply current i dd f out = 0mhz 97 120 ma negative supply current i ss f out = 0mhz 99 120 ma logic supply current i l 0.15 0.30 ma static power dissipation f out = 0mhz 1.3 1.5 w operating power dissipation f out = 100mbps (note 24) 1.4 w note 1: all minimum and maximum specifications are 100% production tested except driver dynamic output current and driver/comparator propagation delays, which are guaranteed by design. all specifications are with dut_ and pmu_ elec- trically isolated, unless otherwise noted. note 2: nominal target value is 49.5 . contact factory for alternate trim selections within the 45 to 55 range. note 3: measured at 1.5v, relative to a straight line through 0 and 3v. note 4: measured at end points, relative to a straight line through 0 and 3v. note 5: dut_ is terminated with 50 to ground, v dhv_ = 3v, v dlv_ = 0, v dtv_ = 1.5v, unless otherwise specified. data_ and rcv_ logic levels are v high = 2v, v low = 1v. note 6: undershoot is any reflection of the signal back towards its starting voltage after it has reached 90% of its swing. preshoot is any aberration in the signal before it reaches 10% of its swing. note 7: at the minimum voltage swing, undershoot is less than 20%. dhv_ and dlv_ references are adjusted to result in the specified swing. note 8: at this pulse width, the output reaches at least 90% of its nominal (dc) amplitude. the pulse width is measured at data_. note 9: with the exception of offset and gain/cmrr tests, reference input values are calibrated for offset and gain. note 10: relative to a straight line through 0 and 3v. note 11: unless otherwise noted, all propagation delays are measured at 40mhz, v dut_ = 0 to 1v, v chv_ = v clv_ = +0.5v, t r = t f = 500ps, z s = 50 , driver in term mode with v dtv_ = +0.5v. comparator outputs are terminated with 50 to gnd. measured from v dut_ crossing calibrated chv_/clv_ threshold to midpoint of nominal comparator output swing. note 12: terminated is defined as driver in drive mode and set to zero volts. note 13: high impedance is defined as driver in high-impedance mode. note 14: v dut_ = 200mv p-p . propagation delay is compared to a reference time at 1.5v. note 15: the comparator meets all its timing specifications with the specified output conditions when the output current is less than 10ma, v comphi > v complo , and v comphi - v complo 1v. higher voltage swings are valid but ac performance may degrade. the maximum comparator output swing is (comphi - complo) 1v when the output is terminated with a 50 resistor to termination voltage v term , where comphi v term complo. note 16: load en low = load en high = 1. note 17: waveform settles to within 5% of final value into load 100k . note 18: i pmu_ = ?ma at v force_ = -2.2v, +1.5v, and +5.2v. percent variation relative to value calculated at v force_ = +1.5v. note 19: time to return to the specified maximum leakage after a 3v, 4v/ns step at dut_. note 20: load at end of 2ns transmission line; for stability only, ac performance may be degraded. note 21: the driver meets all of its timing specifications over the specified digital input voltage range. note 22: timing characteristics with v l = 3v. note 23: specifications are simulated and characterized over the full power-supply range. production tests are performed with power supplies at typical values. note 24: all channels driven at 3v p-p , load = 2ns, 50 transmission line terminated with 3pf.
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators _______________________________________________________________________________________ 9 max9971 toc01 t = 2.0ns/div v dut_ = 50mv/div 0 driver small- signal response v dlv_ = 0 r l = 50 v dhv_ = 500mv v dhv_ = 100mv v dhv_ = 200mv max9971 toc02 t = 2.0ns/div v dut_ = 300mv/div 0 driver large- signal response v dlv_ = 0 r l = 50 v dhv_ = 3v v dhv_ = 1v max9971 toc03 t = 2.0ns/div v dut_ = 500mv/div 0 driver large- signal response into 500 v dlv_ = 0 r l = 500 c l = 0.1pf v dhv_ = 3v v dhv_ = 1v 4.5ns cable max9971 toc04 t = 2ns/div v dut_ = 100mv/div 0 driver 1v p-p , 150mbps signal response v dlv_ = 0 v dhv_ = 1v r l = 50 max9971 toc05 t = 1ns/div v dut_ = 100mv/div 0 driver 1v p-p , 400mbps signal response v dlv_ = 0 v dhv_ = 1v r l = 50 max9971 toc06 t = 2.5ns/div v dut_ = 250mv/div 0 driver 3v p-p , 100mbps signal response v dlv_ = 0 v dhv_ = 3v r l = 50 -2.5 -1.5 -2.0 -0.5 -1.0 0.5 0 1.0 2.0 1.5 2.5 driver linearity error vs. output voltage max9971 toc15 linearity error (mv) dut_ = dtv_ v dlv_ = 1.5v v dhv_ = 1.5v v dut_ (v) 1.5 0.5 -0.5 4.5 3.5 2.5 -1.5 -2.5 5.5 max9971 toc08 driver dc current-limit and overvoltage response v dhv_ = 1.5v v dut_ (v) i dut_ (ma) 6 3 0 -3 -80 -60 -40 -20 0 20 40 60 80 100 -100 -6 9 -300 -200 -250 -100 -150 0 -50 50 37 5911 48 6101213 driver 3v trailing-edge timing error vs. pulse width max9971 toc09 pulse width (ns) timing error (ps) normalized at pw = 12.5ns, period = 25ns, v dhv_ = 3v, v dlv_ = 0 negative pulse positive pulse typical operating characteristics (t a = +25?, unless otherwise noted.)
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators 10 ______________________________________________________________________________________ typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) max9971 toc10 driver time delay vs. common-mode voltage normalized at v cm = 1.5v falling edge rising edge common-mode voltage (v) time delay (ps) 2.5 2.0 1.5 1.0 0.5 -40 -20 0 20 40 60 80 -60 03.0 max9971 toc11 t = 2ns/div v dut_ = 200mv/div 0 drive-to-term transition r l = 50 dhv_ to dtv_ dlv_ to dtv_ max9971 toc12 t = 2ns/div v dut_ = 200mv/div 0 drive-to-high-impedance transition r l = 50 dhv_ to high impedance dlv_ to high impedance -2.5 -1.5 -2.0 -0.5 -1.0 0.5 0 1.0 2.0 1.5 2.5 driver linearity error vs. output voltage max9971 toc13 linearity error (mv) dut_ = dhv_ v dlv_ = 1.5v v dtv_ = 1.5v v dut_ (v) 1.5 0.5 -0.5 4.5 3.5 2.5 -1.5 -2.5 5.5 max9971 toc14 driver linearity error vs. output voltage dut_ = dlv_ v dhv_ = 1.5v v dtv_ = 1.5v v dut_ (v) linearity error (mv) 1.5 0.5 -0.5 4.5 3.5 2.5 -1.5 -1.0 -1.5 -2.0 -0.5 0 0.5 1.0 1.5 2.0 2.5 -2.5 -2.5 5.5 -2.5 -1.5 -2.0 -0.5 -1.0 0.5 0 1.0 2.0 1.5 2.5 driver linearity error vs. output voltage max9971 toc15 linearity error (mv) dut_ = dtv_ v dlv_ = 1.5v v dhv_ = 1.5v v dut_ (v) 1.5 0.5 -0.5 4.5 3.5 2.5 -1.5 -2.5 5.5 crosstalk, dut_ driven by dhv_ with dlv_ varied max9971 toc16 v dlv_ (v) 1.5 0.5 -0.5 4.5 3.5 2.5 -1.5 -2.5 5.5 v dhv_ = 3v v dtv_ = 1.5v normalized at v dlv_ = 0 v dut_ error ( v) -20 -40 -60 -80 0 20 40 60 80 -100 100 crosstalk, dut_ driven by dhv_ with dtv_ varied max9971 toc17 v dtv_ (v) 1.5 0.5 -0.5 4.5 3.5 2.5 -1.5 -2.5 5.5 v dut_ error ( v) -20 -40 -60 -80 0 20 40 60 80 -100 100 v dhv_ = 3v v dlv_ = 0 normalized at v dtv_ = 1.5v crosstalk, dut_ driven by dlv_ with dhv_ varied max9971 toc18 v dhv_ (v) 1.5 0.5 -0.5 4.5 3.5 2.5 -1.5 -2.5 5.5 v dut_ error ( v) -20 -40 -60 -80 0 20 40 60 80 -100 100 v dtv_ = 1.5v v dlv_ = 0 normalized at v dhv_ = 3v
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators ______________________________________________________________________________________ 11 typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) crosstalk, dut_ driven by dlv_ with dtv_ varied max9971 toc19 v dtv_ (v) 1.5 0.5 -0.5 4.5 3.5 2.5 -1.5 -2.5 5.5 v dut_ error ( v) -20 -40 -60 -80 0 20 40 60 80 -100 100 v dhv_ = 3v v dlv_ = 0 normalized at v dtv_ = 1.5v crosstalk, dut_ driven by dtv_ with dhv_ varied max9971 toc20 v dhv_ (v) 1.5 0.5 -0.5 4.5 3.5 2.5 -1.5 -2.5 5.5 v dut_ error ( v) -20 -40 -60 -80 0 20 40 60 80 -100 100 v dtv_ = +1.5v v dlv_ = -1.5v normalized at v dhv_ = 3v crosstalk, dut_ driven by dtv_ with dlv_ varied max9971 toc21 v dlv_ (v) 1.5 0.5 -0.5 4.5 3.5 2.5 -1.5 -2.5 5.5 v dut_ error ( v) -20 -40 -60 -80 0 20 40 60 80 -100 100 v dhv_ = 3v v dtv_ = 1.5v normalized at v dlv_ = 0 max9971 toc22 driver gain vs. temperature normalized at t j = +85 c temperature ( c) gain (v/v) 70 80 60 90 1.0000 1.0002 0.9998 1.0006 1.0004 1.0008 0.9996 50 100 max9971 toc23 driver offset vs. temperature normalized at t j = +85 c temperature ( c) offset (mv) 70 80 60 90 1 2 -1 0 -2 4 3 5 -3 50 100 max9971 toc24 comparator response to 0 to 3v signal v chv_ = v clv_ = 1.5v, r l = 50 v comphi = 1v, v complo = 0 t = 2.0ns/div v cmp_ _ = 100mv/div max9971 toc25 comparator offset vs. common-mode voltage normalized at v cm = 1.5v other comparator reference = -2.5v common-mode voltage (v) offset (mv) -0.5 0.5 -1.5 1.5 2.5 3.5 4.5 0 0.05 -0.10 -0.05 -0.15 -0.25 -0.20 -0.30 0.15 0.10 0.20 -0.35 -2.5 5.5 -400 -300 -200 -100 0 100 200 300 400 0 20406080100 comparator waveform tracking max9971 toc26 reference level (%) timing variation (ps) normalized at 50% reference v dut_ = 0 to 1v pulse v dut_ falling v dut_ rising -150 -110 -130 -70 -90 -30 -50 -10 30 10 50 1 345 2 678910 comparator timing variation vs. pulse width max9971 toc27 pulse width (ns) trailing-edge error (ps) normalized at pw = 10ns
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators 12 ______________________________________________________________________________________ typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) max9971 toc28 comparator timing variation vs. input slew rate slew rate (v/ns) timing variation (ps) 1.5 2.0 2.5 3.0 3.5 4.0 4.5 50 30 40 20 10 0 -10 -20 -30 -40 -50 60 -60 1.0 5.0 normalized at sr = 2v/ns v comphi = 1v, v complo = 0, r l = 50 v dut_ falling v dut_ rising max9971 toc29 comparator response vs. high slew-rate overdrive input slew rate = 6v/ns term mode, v dtv_ = 0 to 1v v comphi = 1v, v complo = 0, r comp_ = 50 t = 2ns/div v cmp_ _ = 200mv/div max9971 toc30 comparator offset vs. temperature temperature ( c) offset ( v) 60 70 80 90 100 0 50 -50 -100 -150 -200 -250 -300 -350 150 -400 50 100 normalized at t j = +75 c max9971 toc31 drive 1v to low-leakage transition t = 2.5 a/div 10 a 0 a max9971 toc32 low leakage to drive 1v transition t = 100ns/div i dut_ = 2 a/div 10 a 0 a max9971 toc33 high-impedance leakage at dut_ vs. dut_ voltage v dut_ (v) i dut_ ( a) -0.5 0.5 -1.5 1.5 2.5 3.5 4.5 -0.2 -0.1 -0.4 -0.3 -0.6 -0.5 -0.7 0.1 0 0.2 -0.8 -2.5 5.5 max9971 toc34 low-leakage current vs. dut_voltage v dut_ (v) i dut_ (na) -0.5 0.5 -1.5 1.5 2.5 3.5 4.5 1.4 1.5 1.2 1.3 1.0 1.1 0.9 1.7 1.6 1.8 0.8 -2.5 5.5 max9971 toc35 i dd supply current vs.temperature temperature ( c) i dd (ma) 70 80 60 90 100 104 105 102 103 100 101 107 106 108 50 max9971 toc36 i ss supply current vs.temperature temperature ( c) i ss (ma) 70 80 60 90 100 -108 -107 -109 -110 -105 -106 -104 50
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators ______________________________________________________________________________________ 13 typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) max9971 toc37 passive load offset vs. temperature temperature ( c) offset ( v) 70 80 60 90 100 80 100 60 20 40 0 -20 140 120 160 50 max9971 toc38 passive load high resistor vs. voltage dut_ = dlv_ v dlv_ = -2.2v v dlv_ = +1.5v v dlv_ = +5.2v voltage (v) resistance ( ) 1.5 0.5 -0.5 4.5 3.5 2.5 -1.5 7300 7200 7100 7700 7800 7900 7400 7500 7600 8000 7000 -2.5 5.5 max9971 toc39 passive load low resistor vs. voltage dut_ = dlv_ v dlv_ = -2.2v v dlv_ = +1.5v v dlv_ = +5.2v voltage (v) resistance ( ) 1.5 0.5 -0.5 4.5 3.5 2.5 -1.5 1900 1850 2100 2150 1950 2000 2050 2200 1800 -2.5 5.5 15 21 18 27 24 33 30 36 42 39 45 -50 -30 -20 -10 -40 0 10 20 40 30 50 pmu_ force_ switch resistance vs. force_ current max9971 toc40 force_ current (ma) switch resistance ( ) v pmu_ = 5.2v 15 21 18 27 24 33 30 36 42 39 45 -50 -30 -20 -10 -40 0 10 20 40 30 50 pmu_ force_ switch resistance vs. force_ current max9971 toc41 force_ current (ma) switch resistance ( ) v pmu_ = 1.5v 15 21 18 27 24 33 30 36 42 39 45 -50 -30 -20 -10 -40 0 10 20 40 30 50 pmu_ force_ switch resistance vs. force_ current max9971 toc42 force_ current (ma) switch resistance ( ) v pmu_ = -2.2v
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators 14 ______________________________________________________________________________________ pin description pin name function 1 data1 channel 1 multiplexer control input. selects driver 1 input from dhv1 or dlv1 in drive mode. see table 1 and figure 2. 2 rcv1 channel 1 multiplexer control input. sets channel 1 mode to drive or receive. see table 1 and figure 2. 3, 8, 13, 18, 51 gnd analog ground 4 cmph1 channel 1 high-side comparator output 5 cmpl1 channel 1 low-side comparator output 6 data2 channel 2 multiplexer control input. selects driver 2 input from dhv2 or dlv2 in drive mode. see table 1 and figure 2. 7 rcv2 channel 2 multiplexer control input. sets channel 2 mode to drive or receive. see table 1 and figure 2. 9 cmph2 channel 2 high-side comparator output 10 cmpl2 channel 2 low-side comparator output 11 cmpl3 channel 3 low-side comparator output 12 cmph3 channel 3 high-side comparator output 14 rcv3 channel 3 multiplexer control input. sets channel 3 mode to drive or receive. see table 1 and figure 2. 15 data3 channel 3 multiplexer control input. selects driver 3 input from dhv3 or dlv3 in drive mode. see table 1 and figure 2. 16 cmpl4 channel 4 low-side comparator output 17 cmph4 channel 4 high-side comparator output 19 rcv4 channel 4 multiplexer control input. sets channel 4 mode to drive or receive. see table 1 and figure 2. 20 data4 channel 4 multiplexer control input. selects driver 4 input from dhv4 or dlv4 in drive mode. see table 1 and figure 2. 21 dhv4 channel 4 driver high voltage input 22 dlv4 channel 4 driver low voltage input 23 dtv4 channel 4 driver termination voltage input 24 chv4 channel 4 threshold voltage input for high-side comparator 25 clv4 channel 4 threshold voltage input for low-side comparator 26 dhv3 channel 3 driver high voltage input 27 dlv3 channel 3 driver low voltage input 28 dtv3 channel 3 driver termination voltage input 29 chv3 channel 3 threshold voltage input for high-side comparator 30 clv3 channel 3 threshold voltage input for low-side comparator 31 dgnd digital ground connection 32 dout serial-interface data output 33 ld load input. latches data from the serial input register to the control register on rising edge. transparent when low. 34 din serial-interface data input 35 sclk serial clock 36 cs chip select 37 sense4 channel 4 pmu sense connection 38 force4 channel 4 pmu force connection
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators ______________________________________________________________________________________ 15 pin description (continued) pin name function 39 sense3 channel 3 pmu sense connection 40 force3 channel 3 pmu force connection 41 temp temperature sensor output 42, 47, 52, 56, 60 v dd positive power-supply input 43 dut4 channel 4 device-under-test connection. driver, comparator, and load i/o node for channel 4. 44 pmu4 channel 4 parametric measurement connection. pmu switch i/o node for channel 4. 45, 50, 53, 57 v ss negative power-supply input 46 v l logic power-supply input 48 dut3 channel 3 device-under-test connection. driver, comparator, and load i/o node for channel 3. 49 pmu3 channel 3 parametric measurement connection. pmu switch i/o node for channel 3. 54 pmu2 channel 2 parametric measurement connection. pmu switch i/o node for channel 2. 55 dut2 channel 2 device-under-test connection. driver, comparator, and load i/o node for channel 2. 58 pmu1 channel 1 parametric measurement connection. pmu switch i/o node for channel 1. 59 dut1 channel 1 device-under-test connection. driver, comparator, and load i/o node for channel 1. 61 force2 channel 2 pmu force connection 62 sense2 channel 2 pmu sense connection 63 force1 channel 1 pmu force connection 64 sense1 channel 1 pmu sense connection 65 complo comparator output-low voltage reference input 66 comphi comparator output-high voltage reference input 67 ldv4 channel 4 load voltage input 68 ldv3 channel 3 load voltage input 69 ldv2 channel 2 load voltage input 70 ldv1 channel 1 load voltage input 71 clv2 channel 2 threshold voltage input for low-side comparator 72 chv2 channel 2 threshold voltage input for high-side comparator 73 dtv2 channel 2 driver termination voltage input 74 dlv2 channel 2 driver low voltage input 75 dhv2 channel 2 driver high voltage input 76 clv1 channel 1 threshold voltage input for low-side comparator 77 chv1 channel 1 threshold voltage input for high-side comparator 78 dtv1 channel 1 driver termination voltage input 79 dlv1 channel 1 driver low voltage input 80 dhv1 channel 1 driver high voltage input ep exposed pad. leave unconnected or connect to ground.
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators 16 ______________________________________________________________________________________ max9972 buffer high-impedance logic high impedance lleak load en high pmu_ 0 0 0 0 dut_ term multiplexer one of four identical channels shown 50 7.5k see table 3 2.0k load en low serial interface 30 force en 1k sense en term common to all four channels lleak sense en force en load en low cs complo comphi sense_ force_ ldv_ clv_ cmpl_ cmph_ chv_ rcv_ data_ dlv_ dtv_ dhv_ sclk din ld dout load en high temp v dd v l v ss gnd dgnd 0 0 figure 1. block diagram
max9972 detailed description the max9972 is a four-channel, pin-electronics ic for automated test equipment that includes, for each chan- nel, a three-level pin driver, a window comparator, a passive load, and a kelvin instrument connection (figure 1). all functions feature a -2.2v to +5.2v operat- ing range and the drivers include both high-impedance and active-termination (3rd-level drive) modes. the comparators feature programmable output voltages, allowing optimization for different cmos interface stan- dards. the loads have selectable output resistance for optimizing dut current loading. the kelvin paths allow accurate connection of an instrument with ?5ma source/sink capability. additionally, the max9972 offers a low-leakage mode that reduces dut_ leakage cur- rent to less than 20na. each of the four channels feature single-ended cmos- compatible inputs, data_ and rcv_, for control of the driver signal path (figure 2). the max9972 modal operation is programmed through a 3-wire, low-voltage cmos-compatible serial interface. output driver the driver input is a high-speed multiplexer that selects one of three voltage inputs: dhv_, dlv_, or dtv_. this switching is controlled by high-speed inputs data_ and rcv_, and mode-control bit term (table 1). data_ and rcv_ are single-ended inputs with threshold levels equal to v l /2. each channel? threshold levels are inde- pendently generated to minimize crosstalk. dut_ can be toggled at high speed between the buffer output and high-impedance mode, or it can be placed into low-leakage mode (figure 2, table 1). high-speed input rcv_ and mode-control bits term and lleak control these modes. in high-impedance mode, the bias current at dut_ is less than 2? over the -2.2v to +5.2v range, while the node maintains its ability to track high-speed signals. in low-leakage mode, the bias current at dut_ is further reduced to less than 20na, and signal tracking slows. the nominal driver output resistance is 50 . custom resistance values from 45 to 51 are possible; con- sult factory for further information. quad, ultra-low-power, 300mbps ate drivers/comparators ______________________________________________________________________________________ 17 table 1. driver channel control signals exter n al c o nn ec tio n s internal control bits rcv_ data_ term lleak driver output driver mode 0 0 x 0 dut_ = dlv_ drive 0 1 x 0 dut_ = dhv_ drive 1x 0 0 high impedance receive 1 x 1 0 dut_ = dtv_ receive x x x 1 low leak low leakage max9972 dlv_ dhv_ dtv_ data_ rcv_ term buffer 50 dut _ 0 0 0 1 1 comparators and load lleak high impedance figure 2. multiplexer and driver channel
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators 18 ______________________________________________________________________________________ comparators the max9972 provides two independent high-speed comparators for each channel. each comparator has one input connected internally to dut_ and the other input connected to either chv_ or clv_ (see figure 1). comparator outputs are a logical result of the input conditions, as indicated in table 2. the comparator output voltages are easily interfaced to a wide variety of logic standards. use buffered inputs comphi and complo to set the high and low output voltages. for correct operation, comphi should be greater than or equal to complo. the comparator 50 output impedance provides source termination (figure 3). passive load the max9972 channels each feature a passive load consisting of a buffered input voltage, ldv_, connected to dut_ through two resistive paths (figure 1). each path connects to dut_ individually by a switch con- trolled through the serial interface. programming options include none (load disconnected), either, or both paths connected. the loads facilitate fast open/short testing in conjunction with the comparator, and pullup of open-drain dut_ outputs. parametric switches each of the four max9972 channels provides force- and-sense paths for connection of a pmu or other dc resource to the device-under-test (figure 1). each force-and-sense switch is independently controlled though the serial interface providing maximum applica- tion flexibility. pmu_ and dut_ are provided on sepa- rate pins allowing designs that do not require the parametric switch feature to avoid the added capaci- tance of pmu_. it also allows pmu_ to connect to dut_ either directly or with an impedance-matching network. low-leakage mode, lleak asserting lleak through the serial port places the max9972 into a very-low-leakage state (see the electrical characteristics table). this mode is conve- nient for making iddq and pmu measurements without the need for an output disconnect relay. lleak control is independent for each channel. when dut_ is driven with a high-speed signal while lleak is asserted, the leakage current momentarily increases beyond the limits specified for normal opera- tion. the low-leakage recovery specification in the electrical characteristics table indicates device behav- ior under this condition. temperature monitor each device supplies a single temperature output sig- nal, temp, that asserts a nominal 3.43v output voltage at a +70? (343k) die temperature. the output voltage increases proportionately with temperature at a rate of 10mv/?. the temperature sensor output impedance is 500 , typical. table 2. comparator logic dut_ > chv_ dut_ > clv_ cmph_ cmpl_ 0000 0101 1010 1111 table 3. passive load resistance values high resistor (k ) low resistor (k ) 7.5 2 max9972 comphi chv_ dut_ clv_ complo 50 cmph_ 50 cmpl_ figure 3. complementary 50 comparator outputs
serial interface and device control a cmos-compatible serial interface controls the max9972 modes (figure 4). control data flow into a 12- bit shift register (lsb first) and are latched when cs is taken high. data from the shift register are then loaded to the per-channel control latches as determined by bits d8?11, and indicated in figure 4 and table 4. the latches contain the six mode bits for each channel of the device. the mode bits, in conjunction with exter- nal inputs data_ and rcv_, manage the features of each channel. transfer data asynchronously from the input registers to the channel registers by forcing ld low. with ld always low, data transfer on the rising edge of cs . max9972 quad, ultra-low-power, 300mbps ate drivers/comparators ______________________________________________________________________________________ 19 table 4. control register bit functions bit state bit name function 01 power-up state 0 term term mode control high impedance term mode 0 1 lleak assert low-leakage mode term mode low leakage 0 2 sense en enable sense switch disabled enabled 0 3 force en enable force switch disabled enabled 0 4 load en low enable low load resistor disabled enabled 0 5 load en high enable high load resistor disabled enabled 0 6 unused x x 0 7 unused x x 0 8 ch1 update channel 1 control register disabled enabled 1 9 ch2 update channel 2 control register disabled enabled 1 10 ch3 update channel 3 control register disabled enabled 1 11 ch4 update channel 4 control register disabled enabled 1 max9972 sclk din cs ld enable quad f/f d q enable 0?5 8 term lleak sense en force en load en low load en hiigh unused unused ch1 ch2 ch3 ch4 mode bits channel 4 mode bits channel 3 mode bits channel 2 mode bits channel 1 load quad f/f d q enable 0?5 9 load quad f/f d q enable 0?5 10 load quad f/f d q enable 0?5 11 6 6 6 6 load 11 10 9 8 7 6 5 4 3 2 1 0 figure 4. serial interface
max9972 heat removal with adequate airflow, no external heat sinking is need- ed under most operating conditions. if excess heat must be dissipated through the exposed pad, solder it to cir- cuit board copper. the exposed pad must be either left unconnected, isolated, or connected to ground. power minimization to minimize power consumption, activate only the needed channels. each channel placed in low-leakage mode saves approximately 240mw. chip information process: bicmos quad, ultra-low-power, 300mbps ate drivers/comparators 20 ______________________________________________________________________________________ sclk cs din d0 d1 d2 d3 d4 d5 d10 d11 t ch t cl t dh t ds t csho t css1 t csh1 t cswh d0 last t do t ldw t cshld dout load t csso d1 last d2 last d3 last d4 last d5 last d10 last d11 last d0 figure 5. serial-interface timing package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 80 tqfp-ep c80e+4 21-0115 90-0152
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators ______________________________________________________________________________________ 21 tqfp max9972 21 22 23 24 25 26 27 28 29 30 32 33 34 35 36 37 38 39 ep 40 31 80 + 79 78 77 76 75 74 73 72 71 69 68 67 66 65 64 63 62 61 70 dhv1 dlv1 dtv1 chv1 clv1 dhv2 dlv2 dtv2 chv2 clv2 ldv1 60 v dd dut1 pmu1 v ss v dd dut2 pmu2 v ss v dd gnd v ss pmu3 dut3 v dd v l v ss pmu4 dut4 v dd temp 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 ldv2 ldv3 ldv4 comphi complo sense1 force1 sense2 force2 dhv4 dlv4 dtv4 chv4 clv4 dhv3 dlv3 dtv3 chv3 clv3 dgnd dout ld din sclk cs sense4 force4 sense3 force3 data2 cmph1 gnd data1 rcv1 cmpl1 cmph2 gnd rcv2 cmpl2 data3 cmph3 gnd rcv3 cmpl3 data4 cmph4 gnd rcv4 cmpl4 pin configuration
max9972 quad, ultra-low-power, 300mbps ate drivers/comparators maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 22 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 6/06 initial release 1 7/09 changed driver offset max value in electrical characteristics table and removed all references to max9971 1?2 2 4/10 added soldering temperature to absolute maximum ratings , updated sclk to dout specification in electrical characteristics table, and replaced figure 5 2, 7, 20 3 9/10 updated absolute maximum ratings and figure 1 2, 16 4 12/10 updated electrical characteristics table and notes 3, 4, 7, 8 5 1/11 changed maximum dc drive current in electrical characteristics table to reflect actual circuit operation 2 6 3/11 narrowed down product offerings and modified exposed die pad connection description; added cs high pulse width to electrical characteristics table 1, 2, 4, 5, 7, 15, 17, 18, 20 7 6/11 corrected/changed spi timing parameters to improve yield and changed global levels for v comphi and v complo 2? 8 6/11 restored original global levels changed in rev 7 2? 9 10/11 correct value for temp sensor nominal voltage 7


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